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Home » SDC Storage.AI, OCP Storage Work, Reducing Chiplet Power Consumption
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SDC Storage.AI, OCP Storage Work, Reducing Chiplet Power Consumption

Press RoomBy Press Room22 September 20254 Mins Read
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SDC Storage.AI, OCP Storage Work, Reducing Chiplet Power Consumption

At the 2025 SNIA SDC new initiatives were discussed to provide better data flows to support AI workflows. OCP partners with SNIA and they talked about storage progress in that hyperscale data center consortium. My colleague, Jim Handy talked about how chiplet and other new semiconductor packaging approaches could replace volatile with non-volatile memories and reduce some of the energy consumption predictions for AI growth.

J. Metz, Chair of the SNIA Board of Directors gave a talk at the 2025 Storage Developers Conference, SDC, about a SNIA initiative to create storage systems made for AI, storage.AI. He said that the purpose of this effort is to create a vendor-neutral, open-standards effort tackling the most pressing AI data service challenges—such as memory tiering, latency, data movement, compute-near-storage, and storage efficiency.

The goals of Storage.AI are to:

  • Reduce I/O data amplification optimize I/O consumption for accelerators
  • Efficient, secure, and reliable data movement through the AI workload lifecycle
  • New initiation and consumption model for accelerators
  • Standardized hardware/software interface definitions
  • Open programming models
  • Secure data movement and capacity

Existing SNIA standard initiatives may help enable Storage.AI including SDXI, smart data acceleration interface, that enable processor-agnostic DMA acceleration and data transformation. The computational storage API and architecture enables near-data compute and the NVM programming model enables a unified software interface for accessing memory tiers.

Swordfish and the Redfish extensions enable storage management while the Object Drive Workgroup enables standard interfaces for object storage. Flexible Data Placement APIs enable optimized data layout and streaming throughput, Security of course protects data and the Green initiative enables power and thermal solutions. The figure below illustrates how all of these existing technical working groups can support Storage.AI.

Members of Storage.AI are interested in creating technical workgroup projects for instance, on File and objects over RDMA/UE that will enable hybrid file and object backends combined with remote memory access. Accelerator Director CPU Bypass will enable bypassing CPUs for data movement between accelerators and data and Accelerator-Initiated Storage I/O to enable the reduction of CPU bottlenecks.

The figure below, from Metz’s talk, shows the perceived improvements from Storage.AI for AI workflows.

There is a broad ecosystem of industry efforts that are partnering on Storage.AI including the Ultra Ethernet Consortium (UEC), NVMe, Open Compute Platform (OCP), Distributed Management Taskforce (DMTF), PCI-SIG, Greengrid and soon, UALink.

The OCP Global Summit is coming up in a few weeks and Ross Stenfort from Meta and Lee Prewitt from Microsoft gave another keynote on OCP storage projects. They showed a table of recent OCP work, shown below.

In particular OCP has contributed to the development of the NVMe SSD for data center specifications. The talk pointed out key features for managing and deploying digital storage at scale. These include the OCP Health Information Extended Log for providing telemetry metrics based on at-scale deployments, the OCP Latency Monitoring Feature for isolating, monitoring and debugging latency spikes at scale. The OCP Formatted Telemetry for Human Readable Logs provides customers useful telemetry with improved security and the Open-Source OCP NVMe Command Line Interface for open-source tooling.

A Hardware Component Log provides manufacturing information to customers. Device Self-Test Improvements provide universal failing segment codes and Device Self-Reporting Power measurements are made more useful at scale.

My colleague on our new non-volatile memory report, Jim Handy ended up giving our talk on The Processor Chip of the Future. This focused on the role of chiplets in future semiconductor packages and how chiplets and future stacked die packaging will enable the use of new non-volatile memories. This is important because volatile memories, like DRAM, are a significant contributor to the energy consumption in data centers. Below are some of the ways in which this contributor to data center energy consumption could be reduced.

At the 2025 SNIA SDC there were talks about Storage.AI to improve data flow for AI Workloads as well as OCP storage initiatives. Non-volatile memories offer ways to reduce energy consumption in AI.

AI Chiplet DRAM energy non-volatile memory OCP SDC SNIA Storage.ai
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